lavalier_switch.kicad_pro 8.9 KB

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  28. "fab_text_upright": false,
  29. "other_line_width": 0.15,
  30. "other_text_italic": false,
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  35. "pads": {
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  40. "silk_line_width": 0.15,
  41. "silk_text_italic": false,
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  45. "silk_text_upright": false,
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  49. }
  50. },
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  53. "meta": {
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  56. "rule_severities": {
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  59. "copper_edge_clearance": "error",
  60. "courtyards_overlap": "error",
  61. "diff_pair_gap_out_of_range": "error",
  62. "diff_pair_uncoupled_length_too_long": "error",
  63. "drill_out_of_range": "error",
  64. "duplicate_footprints": "warning",
  65. "extra_footprint": "warning",
  66. "footprint_type_mismatch": "error",
  67. "hole_clearance": "error",
  68. "hole_near_hole": "error",
  69. "invalid_outline": "error",
  70. "item_on_disabled_layer": "error",
  71. "items_not_allowed": "error",
  72. "length_out_of_range": "error",
  73. "malformed_courtyard": "error",
  74. "microvia_drill_out_of_range": "error",
  75. "missing_courtyard": "ignore",
  76. "missing_footprint": "warning",
  77. "net_conflict": "warning",
  78. "npth_inside_courtyard": "ignore",
  79. "padstack": "error",
  80. "pth_inside_courtyard": "ignore",
  81. "shorting_items": "error",
  82. "silk_over_copper": "warning",
  83. "silk_overlap": "warning",
  84. "skew_out_of_range": "error",
  85. "through_hole_pad_without_hole": "error",
  86. "too_many_vias": "error",
  87. "track_dangling": "warning",
  88. "track_width": "error",
  89. "tracks_crossing": "error",
  90. "unconnected_items": "error",
  91. "unresolved_variable": "error",
  92. "via_dangling": "warning",
  93. "zone_has_empty_net": "error",
  94. "zones_intersect": "error"
  95. },
  96. "rules": {
  97. "allow_blind_buried_vias": false,
  98. "allow_microvias": false,
  99. "max_error": 0.005,
  100. "min_clearance": 0.0,
  101. "min_copper_edge_clearance": 0.0,
  102. "min_hole_clearance": 0.25,
  103. "min_hole_to_hole": 0.25,
  104. "min_microvia_diameter": 0.19999999999999998,
  105. "min_microvia_drill": 0.09999999999999999,
  106. "min_silk_clearance": 0.0,
  107. "min_through_hole_diameter": 0.3,
  108. "min_track_width": 0.19999999999999998,
  109. "min_via_annular_width": 0.049999999999999996,
  110. "min_via_diameter": 0.39999999999999997,
  111. "solder_mask_clearance": 0.0,
  112. "solder_mask_min_width": 0.0,
  113. "use_height_for_length_calcs": true
  114. },
  115. "track_widths": [],
  116. "via_dimensions": [],
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  118. "zones_use_no_outline": true
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  120. "layer_presets": []
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  122. "boards": [],
  123. "cvpcb": {
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  301. "rule_severities": {
  302. "bus_definition_conflict": "error",
  303. "bus_entry_needed": "error",
  304. "bus_label_syntax": "error",
  305. "bus_to_bus_conflict": "error",
  306. "bus_to_net_conflict": "error",
  307. "different_unit_footprint": "error",
  308. "different_unit_net": "error",
  309. "duplicate_reference": "error",
  310. "duplicate_sheet_names": "error",
  311. "extra_units": "error",
  312. "global_label_dangling": "warning",
  313. "hier_label_mismatch": "error",
  314. "label_dangling": "error",
  315. "lib_symbol_issues": "warning",
  316. "multiple_net_names": "warning",
  317. "net_not_bus_member": "warning",
  318. "no_connect_connected": "warning",
  319. "no_connect_dangling": "warning",
  320. "pin_not_connected": "error",
  321. "pin_not_driven": "error",
  322. "pin_to_pin": "warning",
  323. "power_pin_not_driven": "error",
  324. "similar_labels": "warning",
  325. "unannotated": "error",
  326. "unit_value_mismatch": "error",
  327. "unresolved_variable": "error",
  328. "wire_dangling": "error"
  329. }
  330. },
  331. "libraries": {
  332. "pinned_footprint_libs": [],
  333. "pinned_symbol_libs": []
  334. },
  335. "meta": {
  336. "filename": "lavalier_switch.kicad_pro",
  337. "version": 1
  338. },
  339. "net_settings": {
  340. "classes": [
  341. {
  342. "bus_width": 12.0,
  343. "clearance": 0.2,
  344. "diff_pair_gap": 0.25,
  345. "diff_pair_via_gap": 0.25,
  346. "diff_pair_width": 0.2,
  347. "line_style": 0,
  348. "microvia_diameter": 0.3,
  349. "microvia_drill": 0.1,
  350. "name": "Default",
  351. "pcb_color": "rgba(0, 0, 0, 0.000)",
  352. "schematic_color": "rgba(0, 0, 0, 0.000)",
  353. "track_width": 0.25,
  354. "via_diameter": 0.8,
  355. "via_drill": 0.4,
  356. "wire_width": 6.0
  357. }
  358. ],
  359. "meta": {
  360. "version": 2
  361. },
  362. "net_colors": null
  363. },
  364. "pcbnew": {
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  367. "idf": "",
  368. "netlist": "",
  369. "specctra_dsn": "",
  370. "step": "",
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  373. "page_layout_descr_file": ""
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  375. "schematic": {
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  377. "drawing": {
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  379. "default_text_size": 50.0,
  380. "field_names": [],
  381. "intersheets_ref_own_page": false,
  382. "intersheets_ref_prefix": "",
  383. "intersheets_ref_short": false,
  384. "intersheets_ref_show": false,
  385. "intersheets_ref_suffix": "",
  386. "junction_size_choice": 3,
  387. "label_size_ratio": 0.375,
  388. "pin_symbol_size": 25.0,
  389. "text_offset_ratio": 0.15
  390. },
  391. "legacy_lib_dir": "",
  392. "legacy_lib_list": [],
  393. "meta": {
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  397. "ngspice": {
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  399. "fix_passive_vals": false,
  400. "meta": {
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  403. "model_mode": 0,
  404. "workbook_filename": ""
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  406. "page_layout_descr_file": "",
  407. "plot_directory": "",
  408. "spice_adjust_passive_values": false,
  409. "spice_external_command": "spice \"%I\"",
  410. "subpart_first_id": 65,
  411. "subpart_id_separator": 0
  412. },
  413. "sheets": [
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  418. ],
  419. "text_variables": {}
  420. }